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DevOps Engineer (Roma) Località: Roma, Italia Client description La nostra società cliente è una società attiva nelle energie rinnovabili in forte crescita, impegnata a creare un ambiente di lavoro inclusivo e…
VLSI Design Engineer/Micro-architect responsible for designing cutting-edge communication systems from scratch using ASIC/FPGA with Verilog/SystemVerilog.
Our team works on the most advanced digital power management ICs in the industry. This is an excellent full-time/permanent role giving the opportunity to work with an expert team pushing the envelope of digital design,…
Physical Design Engineer at Apple implementing complex SoC designs on advanced (7nm and below) nodes: floorplanning, placement, clock tree synthesis, routing, ECOs, static timing and physical verification, low-power techniques, and CAD flow automation using Innovus/Fusion Compiler and TCL/Perl/Python scripting.
VLSI Design Engineer responsible for designing cutting-edge communication systems from scratch, including micro-architecture definition, RTL coding in Verilog/SystemVerilog, synthesis, timing analysis, and PPA optimization, collaborating closely with verification, DFT, and physical design teams.
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
Designs, develops, and tests FPGAs for SpaceX's Starshield satellite constellation, covering safety-critical logic, sensors, cryptography, and RF/optical communications. Work spans the full FPGA lifecycle using Verilog/SystemVerilog/VHDL, Xilinx SoC platforms, and high-speed serial and networking interfaces, with Top Secret clearance eligibility required.
A Cloud DevSecOps Engineer at NCS builds and maintains AWS cloud infrastructure for client projects: implementing CI/CD pipelines, automating deployments with IaC (Terraform, CloudFormation), and handling monitoring, patching, and tuning to keep services reliable and available.
A hands-on IC role designing, integrating, and signing off RTL for blocks across an ultra-low-power RISC-V SoC — compute-fabric interconnect, memory interfaces, low-power/always-on logic, and peripherals — from microarchitecture spec through synthesis, timing closure, and tapeout. Core tech: SystemVerilog, CDC/LEC, SDC/STA, UPF low-power flows.
GuidePoint Security is hiring a remote (US-based) Security Engineer for its Northeast SecOps consulting practice to design, implement, and optimize client SIEM/SOAR environments — building telemetry pipelines, MITRE ATT&CK-mapped detections, and automation playbooks with tools like Splunk, Microsoft Sentinel, CrowdStrike, XSOAR, Tines, and Torq. Client-facing role with up to 10% travel and an on-c
Weitere Berufsbezeichnung: Mediengestalter/in; Kommunikationsdesigner/in Stellenbeschreibung: Im Bereich Oberbürgermeister, Abteilung Presse- und Öffentlichkeitsarbeit suchen wir Sie als: Webmaster / Content-Manager…
Program manager role orchestrating pre-silicon SoC development for Apple’s next-gen hardware, coordinating design, verification, and validation teams to deliver on-time silicon.
Java Developer in Hong Kong building and supporting distributed batch pipelines that compute PnL, Market Risk, Credit Risk and regulatory feeds. Day-to-day work spans Java/Perl/Python, Apache Spark, tuning slow queries and memory, automating batch recovery, and deploying cloud-native solutions on Azure.
FireMon delivers Network Security Policy Control for the Modern Enterprise. Most enterprises run firewalls from multiple vendors alongside cloud security groups and microsegmentation platforms, and no single console…
Imagine what you could do here at Apple! Together we could help craft the next generation of the world’s finest devices. New ideas have a way of becoming extraordinary products, services, and customer experiences very…
Quevera is hiring a Software Engineer in Annapolis Junction, MD to build mission-critical solutions for government/intelligence clients. The role requires an active TS/SCI with Polygraph clearance, 7 years of SWE experience, and full-stack skills across languages like Python, Java, C#, and JavaScript, plus database and Linux deployment experience.
Legion Technologies is hiring a Principal Software Engineer (DevOps/SRE) to build and run a secure, scalable AWS/Kubernetes cloud platform for its AI-driven workforce management product. The role centers on Terraform, Chef, Jenkins, and Golang automation, CI/CD, monitoring/observability, on-call response, and internal AI agents that reduce SRE toil.
Designs and maintains the RTL-to-GDS physical design flow for AI accelerator chips using Cadence tools, scripting, and advanced 3nm+ process rules.
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